1. Field of the Invention
The present invention relates to an electro-static discharge (ESD) protection circuit, and more particularly to a separated power ESD protection circuit.
2. Description of Related Art
For the integrated circuit, the static charges due to touch of human bodies are often flowing into the internal circuit of the integrated circuit chip via the I/O pins. The static charges usually cause the high voltage pulse and this instant high voltage pulse would cause the damage to the integrated circuit. In order to prevent the integrated circuit from damage due to high voltage electrostatic pulse, electro-static discharge (ESD) protection circuits are disposed between the input pads and the internal circuit, so as to provide a discharge route for ESD, leading ESD currents to the power line.
For a mixed-mode signal integrated circuit, which comprises analog circuits and digital circuits, the power lines respectively used by the analog circuits and the digital circuits are separate, so as to avoid noises. For this design of the separated power lines, noises generated on the power lines for the digital circuit due to fast transition of the states of the digital circuits are not transmitted to the power lines of the analog circuits. FIG. 1 is a schematic drawing showing a prior art ESD protection circuit. Referring to FIG. 1, when ESD event occurs in one I/O pin to another I/O pin or one power pin to another power pin, the ESD current does not only flow through the widest metal line in the integrated circuit. When it occurs on the interface circuit between the two separated power lines, the ESD current usually flows along the weakest route. The interface circuit may get damaged due to ESD. Accordingly, the design of the separated power lines in the bus undermines the robustness of the integrated circuit.
FIG. 2 is a schematic circuit showing a charged-device model (CDM) ESD protection circuit. The design of the circuit has the big problem on the separated power in integrated circuit either. In the ESD event on CDM protection circuit, static charges are stored in the bulk of the integrated circuit from the beginning. Then the static charges are discharged to the pad, which is grounded. This prior art CDM ESD protection circuit provides two routes. One route is through the CDM clamp circuit; the other is through the bi-direction diode string between the power lines VDD_I/O and VDD_Internal, and between VSS_I/O and VSS_Internal. If there is no the bi-direction diode string, under a high ESD current, some CMD current would damage the gate oxide layer in input.
FIG. 3 is a schematic view showing an ESD protection circuit disclosed in U.S. Pat. No. 6,075,686. The circuit comprises two diode strings with diodes coupled in opposite direction and in parallel, between the first power line and the second power line. In addition, FIG. 4 is a schematic drawing showing an ESD protection circuit disclosed in U.S. Pat. No. 6,040,968. Two diodes connected in parallel with opposite direction are disposed between the first and the second power lines. The application of these diodes, however, does not efficiently protect the circuit from ESD.